CV

General Information

Full Name Marco P. E. Apolinario
Languages English (fluent), Spanish (native)

Research Interests

  • Memory-efficient learning algorithms for on-device adaptation under hardware constraints.
  • Continual learning and in-context adaptation in deep neural networks.
  • Biologically-inspired local learning rules and gradient-free optimization.
  • Algorithm-hardware co-design for energy-efficient, brain-inspired AI.

Education

  • 2021 - 2025
    PhD in Electrical and Computer Engineering
    Purdue University, West Lafayette, Indiana, US
  • 2013 - 2017
    BS in Electronics Engineering
    National University of Engineering (UNI), Lima, Peru

Experience

  • 2026 - Present
    Postdoctoral Researcher
    Delft University of Technology (TU Delft), Delft, Netherlands
    • Advisor: Prof. Charlotte Frenkel.
    • Research on hardware-algorithm co-design for NeuroAI.
  • 2021 - 2025
    Graduate Research Assistant
    Purdue University - Center for Brain-Inspired Computing (C-BRIC), West Lafayette, Indiana, US
    • Advisor: Prof. Kaushik Roy.
    • Conduct research on neuro-inspired machine learning algorithms for emerging hardware technologies, with emphasis on scalability and energy efficiency in neuromorphic systems.
    • Developed CODE-CL, a continual learning framework using conceptor-based gradient projection, enabling knowledge retention and forward transfer in sequential tasks.
    • Designed an ADC-less in-memory computing hardware for Spiking Neural Networks, achieving 2–7× energy savings and 9–24× latency reduction over conventional architectures through HW/SW co-design.
    • Proposed novel spatial, temporal, and fully local learning rules (LLS, S-TLLR, TESS), inspired by biologically plausible mechanisms such as STDP, synchronization, and eligibility traces; matched backpropagation performance at significantly lower computational cost.
  • 2024
    Visiting Researcher
    TU Delft – Cognitive Sensor Nodes and Systems (CogSys) Team, Delft, Netherlands
    • Advisor: Prof. Charlotte Frenkel.
    • Conducted a three-month research visit on custom digital hardware accelerators for on-device learning using local learning rules in artificial neural networks, supported by the NSF AccelNet NeuroPAC Fellowship.
  • 2023
    Systems Engineering Intern
    Texas Instruments - Kilby Labs, Dallas, Texas, US
    • Conducted research into hardware-aware neural architecture and quantization search, leveraging evolutionary optimization algorithms to facilitate the deployment of deep learning models on low-power devices. Achieved a 10x reduction in model search time and a 5% increase in model performance for keyword spotting tasks.
  • 2017 - 2020
    Research Assistant in Computer Vision
    National Institute for Research and Training in Telecommunications (INICTEL-UNI), Lima, Peru
    • Developed energy-efficient machine learning models for diverse applications, including timber species identification, underwater acoustic inversion, satellite cloud segmentation, and river level estimation.
    • Integrated ML algorithms into low-power embedded systems, enabling real-time inference for precision agriculture applications.
    • Designed a lightweight CNN achieving >90% accuracy in timber species recognition under open-set conditions.
    • Secured three software copyrights in remote sensing and health monitoring.
    • Published one journal paper and three conference papers.

Honors and Awards

  • 2026
    Best Student Paper Award, WACV 2026
    IEEE/CVF WACV
    • Awarded for "Feedback Alignment Meets Low-Rank Manifolds -- A Structured Recipe for Local Learning" in the algorithms track of IEEE/CVF WACV 2026.
  • 2024
    NSF AccelNet NeuroPAC Fellowship
    NSF AccelNet NeuroPAC
    • Selective international fellowship supporting cross-border collaborations in neuromorphic computing; awarded to conduct research on digital on-chip learning hardware accelerators at TU Delft.
  • 2020
    Graduate Peruvian Fellowship "Beca Generacion del Bicentenario"
    Peruvian Ministry of Education (PRONABEC)
    • Prestigious national fellowship fully funded by the Peruvian Ministry of Education; awarded to top scholars across Peru to pursue graduate studies abroad.
  • 2017
    Julio Urbina Arias Award
    IEEE Student Branch at the National University of Engineering (UNI)
    • Recognition for outstanding research and leadership contributions as an active member of the IEEE Student Branch, National University of Engineering, Lima, Peru.

Registered Software / Intellectual Property

  • Feb 2022
    SM-GROVER
    • Geo-referenced monitoring system for COVID-19 with virtual assistant and respiratory-rate estimation. Software IP registration, INDECOPI 00376-2022. Co-developer.
  • Jun 2021
    SINIM-1
    • Cloud identification in multispectral satellite imagery. Software IP registration, INDECOPI 00740-2021. Co-developer.
  • Mar 2021
    KASPI
    • Mobile application for identification of Peruvian timber species. Software IP registration, INDECOPI 00294-2021. Co-developer.

Teaching

  • Jan 2020
    Instructor, Short Course on Digital Image Processing (24 hours)
    INICTEL-UNI, Lima, Peru
    • Designed and delivered a 24-hour short course on digital image processing for early-career engineers and students.
  • 2015 - 2017
    Workshop Instructor, IEEE Student Branch
    National University of Engineering (UNI), Lima, Peru
    • Taught hands-on workshops on signal and image processing and introductory machine learning for undergraduate audiences as part of the IEEE Signal Processing Society and Robotics & Automation Society student chapters.

Mentorship and Outreach

  • 2025 - Present
    Mentor, Talento Guía (PRONABEC, Peru National Scholarship Program)
    • Mentor for incoming Peruvian graduate students abroad (Beca Generación del Bicentenario Fellows), providing academic, cultural, and professional guidance for their transition to international graduate programs.
  • 2021 - 2022
    Mentor, Serendipity: Mentorship in Science Program
    • Mentored Peruvian undergraduate students in STEM on career development, research opportunities, and pathways to graduate school.
  • 2020 - Present
    Speaker - STEM Outreach
    • Invited speaker at IEEE and university events in Peru, promoting undergraduate research and STEM engagement.
  • 2016 - 2017
    Vice Chair, IEEE Signal Processing Society Student Chapter
    National University of Engineering (UNI), Peru
    • Co-founded the first IEEE Signal Processing Society Student Chapter in Peru; promoted undergraduate-led research projects in signal and image processing.
  • 2015 - 2016
    Research Director, IEEE Robotics and Automation Society Student Chapter
    National University of Engineering (UNI), Peru
    • Led student research groups in robotics and computer vision; organized national robotics competitions, technical talks, and workshops.

Travel Grants

  • 2025

    San Diego, CA, USA

    LatinX in AI (LXAI) Travel Grant - NeurIPS
    • Competitively awarded grant supporting participation and presentation at the LatinX in AI Research Workshop co-located with NeurIPS.
  • 2025

    Honolulu, HI, USA

    ICCV Broadening Participation Travel Grant
    • Awarded for conference participation based on scientific contribution, need, and commitment to broadening participation within the ICCV community.

Invited Talks

  • Apr 2025
    Energy-Efficient Brain-Inspired Learning in Deep Neural Networks
    IEEE Signal Processing Society student chapter, National University of Engineering, Lima, Peru (online)
  • Nov 2024
    Local Learning for Deep Neural Networks
    Data Management and Biometrics Group, University of Twente, The Netherlands
  • Jul 2024
    Neuromodulation on Brain and Machines
    Telluride Neuromorphic Cognition Engineering Workshop, Telluride, CO, USA (co-presented with Dr. Kathryn Simone)
  • Jun 2024
    Hardware/Software Co-design with ADC-Less In-Memory Computing for SNNs
    In-Memory Computing Applications Workshop at DAC 2024, San Francisco, CA, USA
  • Aug 2023
    Enabling High-Performance ADC-Less In-Memory Computing for Deploying SNNs Through Hardware-Aware Training
    Workshop on Modeling & Simulation of Systems and Applications (ModSim23), Seattle, WA, USA
  • Jul 2021
    Experiencia estudiando un posgrado en EEUU - Becas y oportunidades
    IEEE Signal Processing Society student chapter, National University of Engineering, Lima, Peru (online)

Academic Service

  • Review Committee Member (RCM): IEEE International Symposium on Circuits and Systems (ISCAS), 2025 -- coordinated the peer-review process for three papers, synthesizing feedback from multiple reviewers and submitting preliminary decisions (role analogous to Associate Editor / Area Chair).
  • Reviewer for Journals: IEEE Transactions on Image Processing (TIP), IEEE Transactions on Cognitive and Developmental Systems (TCDS), IEEE Transactions on Biomedical Circuits and Systems (TBioCAS), and IEEE Latin America Transactions.
  • Reviewer for Conferences: NeurIPS (2024, 2025), ICLR (2025, 2026), ICML (2025), ICCV (2025), ECCV (2026), AAAI (2026), CVPR (2025), IJCNN (2025), ICANN (2024, 2025), and IEEE INTERCON (2024).

In the Press

  • 2026
    Interview in APTC La Revista (magazine of the Peruvian Telecommunications Association)
    • "El cerebro humano es la computadora más eficiente" ["The human brain is the most efficient computer"].

Professional Development

  • 2024
    Telluride Neuromorphic Cognition Engineering Workshop
    • Highly selective international workshop; hands-on projects on neuromodulation mechanisms for synaptic plasticity and reinforcement learning.
  • 2024
    SRC TECHCON
    • Semiconductor Research Corporation's flagship annual conference, Austin, TX, engaging with industry leaders on advances in semiconductor and AI research.
  • 2021
    Neuromatch Academy - Computational Neuroscience Summer School
    • Intensive online summer school on computational neuroscience, exploring parallels between artificial neural networks and in-vivo brain responses to visual stimuli.

Technical Strengths

  • Programming and Hardware Description Languages: Python, C/C++, VHDL/Verilog, and Git
  • EDA tools: Cadence Virtuoso, Quartus Prime, and Eagle PCB
  • Machine Learning Frameworks: PyTorch, TensorFlow/Keras
  • Languages: English (fluent), Spanish (native)

Relevant Coursework

  • Graduate Electronics: AI Hardware, Computer Architecture, System-on-Chip Design, Analog CMOS Design, Advanced VLSI Design, MOS VLSI Design, Solid State Devices
  • Graduate Computer Science: Applied Quantum Computing, Optimization for Deep Learning, Computational Methods in Optimization, Artificial Intelligence