CV

General Information

Full Name Marco Paul E. Apolinario Lainez
Languages English, Spanish

Education

  • 2021 - Present
    PhD in Electrical and Computer Engineering
    Purdue University, West Lafayette, Indiana, US
  • 2013 - 2017
    BS in Electronics Engineering
    National University of Engineering (UNI), Lima, Peru

Experience

  • 2023 - 2023
    Systems Engineering Intern
    Texas Instruments - Kilby Labs, Dallas, Texas, US
    • Conducted research into hardware-aware neural architecture and quantization search, leveraging evolutionary optimization algorithms to facilitate the deployment of deep learning models on low-power devices.
  • 2021 - Present
    Graduate Research Assistant
    Purdue University - Center for Brain-Inspired Computing (C-BRIC), West Lafayette, Indiana, US
    • Explored innovative neuro-inspired machine learning algorithms tailored for emerging hardware technologies.
    • Spearheaded the design of an avant-garde ADC-Less In-memory Computing Hardware, specifically optimized for Spiking Neural Networks, employing a collaborative HW/SW co-design approach. This resulted in remarkable energy savings of 2-7x and latency reductions of 9-24x when compared to traditional architectures.
    • Engineered and implemented a novel temporal local learning rule (S-TLLR) for Spiking Neural Networks, drawing inspiration from the STDP mechanism. This approach demonstrated equivalent performance to the BPTT algorithm across various time-dependent tasks.
  • 2017 - 2020
    Research Assistant in Computer Vision
    National Institute for Research and Training in Telecommunications (INICTEL-UNI), Lima, Peru
    • Contributed to the development of various machine learning models for different applications, including timber species identification, underwater acoustic inversion, satellite cloud segmentation, and river level estimation.
    • Integrated machine learning algorithms into low-power electronic systems to enable real-time inference capabilities for precision agriculture applications.
    • Innovated by proposing a lightweight CNN model designed for recognizing timber species in microscope images, achieving accuracy rates exceeding 90%, even in scenarios with open-set conditions.
    • Obtained three software copyrights, covering applications in remote sensing and health monitoring.
    • Shared insights through scholarly contributions, including one journal paper and three conference papers.

Relevant Projects

  • 2021 - 2022
    Hardware/Software co-design of In-memory Computing for Spiking Neural Networks
    • Designed energy-efficient In-memory Computing hardware for spiking neural networks (SNN) to deploy such models for real-time edge applications achieving low latency and energy consumption.
  • 2018 - 2020
    Open-Set Recognition of Peruvian Timber Species
    • Produced one low-power field-deployable electronic prototype to perform open-set recognition of 16 Peruvian timber species in real-time with high accuracy based on a lightweight convolutional neural network.
  • 2019
    Software for Cloud Segmentation of PERUSAT-1 Multispectral Satellite Images
    • Developed a software product for the Space Agency of Peru (CONIDA) to generate accurate cloud masks over PERUSAT-1 images (high-resolution multispectral satellite images) based on deep learning models.

Honors and Awards

  • 2020
    Fully funded Graduate Peruvian Fellowship "Beca Generacion del Bicentenario"
    Peruvian Ministry of Education (PRONABEC)
    • Awarded to outstanding young Peruvian professionals.
  • 2017
    "Julio Urbina Arias" Award
    IEEE Student Branch at the National University of Engineering (UNI)
    • Awarded to outstanding student member in research and projects.

Relevant Coursework

  • VLSI design courses: Advanced VLSI Design (Spring'22), MOS VLSI Design (Fall'21), Solid State Devices (Spring'21).
  • Computer Science courses: Artificial Intelligence (Fall'21), Computational Methods in Optimization (Spring'22).

Course Projects

  • Spring 2022
    Multi-bit dot-product operation with SRAM-cells [ECE695 – Advanced VLSI Design]
    • Implemented an analog-like in-memory multi-bit dot-product engine using standard 8T-SRAM cells.
    • Skills: Cadence Virtuoso, mixed-signal design, and corner analysis.
  • Spring 2022
    Compressed Sensing Algorithms [CS520 – Computational Methods in Optimization]
    • Programmed, compared, and applied three compressed sensing algorithms (OMP, GPSR, and SpaRSA) for audio signal compression, image reconstruction, and image classification applications.
    • Skills: Python programming and optimization analysis.
  • Fall 2021
    In-memory bitwise NOR operation with 8T-SRAM [ECE559 – MOS VLSI Design]
    • Designed and simulated a 128x16 8T-SRAM array to perform in-memory bitwise NOR operations.
    • Skills: Cadence Virtuoso, layout design, and schematic design.
  • Fall 2021
    Near-Lossless Analog to Spiking Neural Networks Conversion [ECE570 – Artificial Intelligence]
    • Studied the role of reset mechanism in ANN-to-SNN conversion schemes to train deep spiking networks.
    • Skills: Python programming, PyTorch, and Deep Neural Networks.

Technical Strenghts

  • Programming Skills: Python, C++, VHDL/Verilog, Pytorch, Tensorflow/Keras.
  • EDA software: Cadence Virtuoso, Quartus Prime, and Eagle PCB.