CV

General Information

Full Name Marco P. E. Apolinario
Languages English, Spanish

Education

  • 2021 - 2025
    PhD in Electrical and Computer Engineering
    Purdue University, West Lafayette, Indiana, US
  • 2013 - 2017
    BS in Electronics Engineering
    National University of Engineering (UNI), Lima, Peru

Experience

  • 2021 - Present
    Graduate Research Assistant
    Purdue University - Center for Brain-Inspired Computing (C-BRIC), West Lafayette, Indiana, US
    • Conduct research on neuro-inspired machine learning algorithms for emerging hardware technologies, with emphasis on scalability and energy efficiency in neuromorphic systems.
    • Developed CODE-CL, a continual learning framework using conceptor-based gradient projection, enabling knowledge retention and forward transfer in sequential tasks.
    • Designed an ADC-less in-memory computing hardware for Spiking Neural Networks, achieving 2–7× energy savings and 9–24× latency reduction over conventional architectures through HW/SW co-design.
    • Proposed novel spatial, temporal, and fully local learning rules (LLS, S-TLLR, TESS), inspired by biologically plausible mechanisms such as STDP, synchronization, and eligibility traces; matched backpropagation performance at significantly lower computational cost.
  • 2024 - 2024
    Visiting Researcher
    TU Delft – Cognitive Sensor Nodes and Systems (CogSys) Team, Delft, Netherlands
    • Conducted research on custom digital hardware accelerators for on-device learning using local learning rules in artificial neural networks, supported by the NSF AccelNet NeuroPAC Fellowship.
  • 2023 - 2023
    Systems Engineering Intern
    Texas Instruments - Kilby Labs, Dallas, Texas, US
    • Conducted research into hardware-aware neural architecture and quantization search, leveraging evolutionary optimization algorithms to facilitate the deployment of deep learning models on low-power devices. Achieved a 10x reduction in model search time and a 5% increase in model performance for keyword spotting tasks.
  • 2017 - 2020
    Research Assistant in Computer Vision
    National Institute for Research and Training in Telecommunications (INICTEL-UNI), Lima, Peru
    • Developed energy-efficient machine learning models for diverse applications, including timber species identification, underwater acoustic inversion, satellite cloud segmentation, and river level estimation.
    • Integrated ML algorithms into low-power embedded systems, enabling real-time inference for precision agriculture applications.
    • Designed a lightweight CNN achieving >90% accuracy in timber species recognition under open-set conditions.
    • Secured three software copyrights in remote sensing and health monitoring.
    • Published one journal paper and three conference papers.

Honors and Awards

  • 2024
    NSF AccelNet NeuroPAC Fellowship
    NSF AccelNet NeuroPAC
    • Selective international fellowship supporting cross-border collaborations in neuromorphic computing; awarded to conduct research on digital on-chip learning hardware accelerators at TU Delft.
  • 2020
    Graduate Peruvian Fellowship "Beca Generacion del Bicentenario"
    Peruvian Ministry of Education (PRONABEC)
    • Prestigious national fellowship fully funded by the Peruvian Ministry of Education; awarded to top scholars across Peru to pursue graduate studies abroad.
  • 2017
    "Julio Urbina Arias" Award
    IEEE Student Branch at the National University of Engineering (UNI)
    • Recognition for outstanding research and leadership contributions as an active member of the IEEE Student Branch, National University of Engineering, Lima, Peru.

Academic Service

  • Reviewer for Journals: IEEE Transactions on Image Processing, IEEE Transactions on Cognitive and Developmental Systems, IEEE Transactions on Biomedical Circuits and Systems (TBioCAS), and IEEE Latin America Transactions.
  • Reviewer for Conferences: International Conference on Machine Learning (ICML), International Conference on Computer Vision (ICCV), International Conference on Learning Representations (ICLR), Neural Information Processing Systems (NeurIPS), International Conference on Artificial Neural Networks (ICANN) and IEEE INTERCON.

Technical Strengths

  • Programming and Hardware Description Languages: Python, C/C++, VHDL/Verilog, and Git
  • EDA tools: Cadence Virtuoso, Quartus Prime, and Eagle PCB
  • Machine Learning Frameworks: Pytorch, Tensorflow/Keras
  • Languages: English (fluent), Spanish (native)