CV
General Information
| Full Name | Marco Paul E. Apolinario Lainez |
| Languages | English, Spanish |
Education
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2021 - Present PhD in Electrical and Computer Engineering
Purdue University, West Lafayette, Indiana, US - Advisor: Prof. Kaushik Roy.
- Research Topic: Brain-Inspired Computing.
- GPA: 3.9.
Experience
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2024 - Present Visiting Researcher
TU Delft – Cognitive Sensor Nodes and Systems (CogSys) Team, Delft, Netherlands - Conducted research on custom digital hardware accelerators for on-device learning using local learning rules in artificial neural networks, supported by the NSF AccelNet NeuroPAC Fellowship.
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2023 - 2023 Systems Engineering Intern
Texas Instruments - Kilby Labs, Dallas, Texas, US - Conducted research into hardware-aware neural architecture and quantization search, leveraging evolutionary optimization algorithms to facilitate the deployment of deep learning models on low-power devices. Achieved a 10x reduction in model search time and a 5% increase in model performance for keyword spotting tasks.
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2021 - Present Graduate Research Assistant
Purdue University - Center for Brain-Inspired Computing (C-BRIC), West Lafayette, Indiana, US - Conducted research on neuro-inspired machine learning algorithms for emerging hardware technologies, focusing on scalability and energy efficiency in neuromorphic systems.
- Designed a novel ADC-Less In-memory Computing Hardware, specifically optimized for Spiking Neural Networks, employing a collaborative HW/SW co-design approach. This resulted in remarkable energy savings of 2-7x and latency reductions of 9-24x when compared to traditional architectures.
- Engineered and implemented a novel temporal local learning rule (S-TLLR) for Spiking Neural Networks, drawing inspiration from the STDP mechanism. This approach demonstrated equivalent performance to the BPTT algorithm across various time-dependent tasks with 1.3-6.6x reduction in memory usage.
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2017 - 2020 Research Assistant in Computer Vision
National Institute for Research and Training in Telecommunications (INICTEL-UNI), Lima, Peru - Contributed to the development of various machine learning models for different applications, including timber species identification, underwater acoustic inversion, satellite cloud segmentation, and river level estimation.
- Integrated machine learning algorithms into low-power electronic systems to enable real-time inference capabilities for precision agriculture applications.
- Innovated by proposing a lightweight CNN model designed for recognizing timber species in microscope images, achieving accuracy rates exceeding 90%, even in scenarios with open-set conditions.
- Obtained three software copyrights, covering applications in remote sensing and health monitoring.
- Shared insights through scholarly contributions, including one journal paper and three conference papers.
Honors and Awards
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2024 NSF AccelNet NeuroPAC Fellowship
NSF AccelNet NeuroPAC - Awarded for conducting research on a digital on-chip learning hardware accelerator at Delft University of Technology (TU Delft).
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2020 Graduate Peruvian Fellowship "Beca Generacion del Bicentenario"
Peruvian Ministry of Education (PRONABEC) - Fully funded by the Peruvian Ministry of Education, recognizing outstanding professionals with high potential for innovation and research in graduate studies.
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2017 "Julio Urbina Arias" Award
IEEE Student Branch at the National University of Engineering (UNI) - Recognized for exceptional contributions to research and leadership within the IEEE Student Branch at the National University of Engineering, Lima, Peru.
Academic Service
- Reviewed for IEEE Journals: IEEE Transactions on Biomedical Circuits and Systems (TBioCAS), and IEEE Latin America Transactions.
- Reviewed for Conferences: Neural Information Processing Systems (NeurIPS), International Conference on Artificial Neural Networks (ICANN) and IEEE INTERCON.
Technical Strenghts
- Programming and Hardware Description Languages (HDL): Python, C++, VHDL/Verilog.
- Machine Learning Frameworks: Pytorch, Tensorflow/Keras.
- EDA software: Cadence Virtuoso, Quartus Prime, and Eagle PCB.
Relevant Coursework
- VLSI design courses: Computer Architecture (Fall'23), System on Chip Design (Fall'22), Analog CMOS Design (Fall'22), Advanced VLSI Design (Spring'22), MOS VLSI Design (Fall'21), Solid State Devices (Spring'21).
- Computer Science courses: Applied Quantum Computing (Spring'23), Optimization for Deep Learning (Fall'23), Computational Methods in Optimization (Spring'22), Artificial Intelligence (Fall'21).
Course Projects
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Spring 2022 Multi-bit dot-product operation with SRAM-cells [ECE695 – Advanced VLSI Design]
- Implemented an analog-like in-memory multi-bit dot-product engine using standard 8T-SRAM cells.
- Skills: Cadence Virtuoso, mixed-signal design, and corner analysis.
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Spring 2022 Compressed Sensing Algorithms [CS520 – Computational Methods in Optimization]
- Programmed, compared, and applied three compressed sensing algorithms (OMP, GPSR, and SpaRSA) for audio signal compression, image reconstruction, and image classification applications.
- Skills: Python programming and optimization analysis.
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Fall 2021 In-memory bitwise NOR operation with 8T-SRAM [ECE559 – MOS VLSI Design]
- Designed and simulated a 128x16 8T-SRAM array to perform in-memory bitwise NOR operations.
- Skills: Cadence Virtuoso, layout design, and schematic design.
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Fall 2021 Near-Lossless Analog to Spiking Neural Networks Conversion [ECE570 – Artificial Intelligence]
- Studied the role of reset mechanism in ANN-to-SNN conversion schemes to train deep spiking networks.
- Skills: Python programming, PyTorch, and Deep Neural Networks.